1. Field of the Invention
The invention relates to a circuit for dealing with higher harmonics and a circuit for amplifying a power efficiency, including the previously mentioned circuit.
2. Description of the Related Art
It is quite important for a radioxe2x80x94communication device driven by power supplied from a cell, such as a cellular phone, to enhance a power efficiency of a transistor amplifier in order to lengthen a period of time in which the device is operable. To this end, active elements in the radioxe2x80x94communication device are designed to be able to operate at a low voltage by reducing a parasitic resistance of a transistor to thereby lower a rise-up voltage as much as possible, and circuits in the radioxe2x80x94communication device are subject to higher harmonic treatment to reduce power loss at higher harmonics.
In general, when a transistor is biased to B-grade, an output current includes a fundamental harmonic having a frequency fo and M-th order higher harmonics having a frequency 2f0, 4f0, 6f0, - - - , and Mf0, wherein M is an even number.
Hence, for instance, Japanese Patent No. 2513146 has suggested a power amplifying circuit to reduce power loss caused by higher harmonics, to zero. In the suggested circuit, a load impedance exerting on an output terminal of a transistor is short-circuited at M-th order higher harmonics, so that M-th order voltage higher harmonics cannot exist, and the load impedance is released at N-th higher harmonics, so that only voltage higher harmonics can exist, wherein N is an odd number.
Most of usually used amplification circuits are designed to include a load circuit as illustrated in FIG. 1, which does not carry out dealing with higher harmonics. If the circuit suggested in Japanese Patent No. 2513146 is applied to the circuit illustrated in FIG. 1, a load circuit or a circuit for dealing with higher harmonics, as illustrated in FIG. 2, could be obtained.
The circuit illustrated in FIG. 1 is comprised of an output terminal C of an amplification transistor (not illustrated), a resistor R0 grounded at one end and having a resistance of 50 ohms, an input terminal B of the resistor R0, a first transmission line T11, and a second transmission line T12. The first and second transmission lines T11 and T12 are electrically connected in series to each other between the output terminal C and the input terminal B.
The first transmission line T11 has a length of xcex/4 wherein xcex indicates a wavelength of a signal to be amplified, that is, a fundamental harmonics, and a resistance of 70 ohms. The second transmission line T12 has a length of xcex/4, and a resistance of 32 ohms. Herein, it is assumed that the fundamental harmonics has a frequency of f0.
The second transmission line T12 has a function of converting an impedance a fundamental harmonics. The illustrated circuit has a load impedance ZL in view of the input terminal C.
The first transmission line T11 having a length of xcex/4 would have a length of xcex2/2 wherein xcex2 indicates a wavelength of a second-order higher harmonics. Hence, an impedance of the second-order higher harmonics at the output terminal C is short-circuited, and resultingly, becomes zero. The first transmission line T11 having a length of xcex/4 would have a length of 3xcex3/4 wherein xcex8 indicates a wavelength of a third-order higher harmonics. Hence, an impedance of the third-order higher harmonics at the output terminal C is released, and resultingly, becomes infinite ( ). As a result, power loss caused by higher harmonics can be reduced to zero.
The load circuit illustrated in FIG. 1 is effectual to second- and third order higher harmonics, but can not be effectual to fourth- or higher order higher harmonics. Hence, the circuit as disclosed in Japanese Patent No. 2513146 has been suggest in order to solve this problem.
FIG. 2 is a circuit diagram of the circuit suggested in Japanese Patent No. 2513146. The illustrated circuit is comprised of an output terminal C of an amplification transistor (not illustrated), a resistor R0 grounded at one end and having a resistance of 50 ohms, an input terminal B of the resistor R0, a first transmission line T11, a second transmission line T12, and a plurality of transmission lines T2 to T7 electrically connected in parallel with one another to a connection point A between the first and second transmission lines T11 and T12.
The first and second transmission lines T11 and T12 are electrically connected in series to each other between the output terminal C and the input terminal B.
The first transmission line T11 has a length of xcex/4 wherein xcex indicates a wavelength of a signal to be amplified, that is, a fundamental harmonics, and a resistance of 70 ohms. The second transmission line T12 has a length of xcex/4, and a resistance of 32 ohms.
Each of the transmission lines T2 to T7 has an open end, and has a length defined by the following equation:
L=xcex/4(1+M)(M=1, 2, 3, - - -, N). 
That is, the circuit illustrated in FIG. 2 further includes the transmission lines T2 to T7 in comparison with the circuit illustrated in FIG. 1.
The transmission line T2 corresponding to M=1 has a length of xcex/8, and hence, the second-order higher harmonics is short-circuited at a connection-A through which the first and second transmission lines T11 and T12 are connected.
The transmission line T3 corresponding to M=2 has a length of xcex/12, and hence, the third-order higher harmonics is also short-circuited at the connection A.
As is readily understood to those skilled in the art, the circuit illustrated in FIG. 2 is also effectual to the fourth- or more order higher harmonics. Hence, by arranging the circuit between the output terminal C of a transistor acting as an amplifier and the resistor R0, there can be accomplished an amplification circuit having a high efficiency.
The circuit illustrated in FIG. 2 has such a load impedance as illustrated in FIG. 3. As is understood in FIG. 3, the impedance is short-circuited at M-th order higher harmonics, and is released at N-th order higher harmonics wherein M is an even number and N is an odd number.
However, comparing the load impedance illustrated in FIG. 3 to a load impedance of the circuit illustrated in FIG. 1, illustrated in FIG. 4, it is understood that the impedance of the fundamental harmonics f0 is deviated. This is because a reactance at a fundamental harmonics, of the added stubs, that is, the transmission lines T2 to T7 is residual. The residual reactance causes that a phase difference between a voltage and a current in a fundamental harmonic is deviated from an ideal difference, that is 180 degrees. This deviation in a phase difference causes power loss at a fundamental harmonics, resulting in that a power efficiency is not improved so much. Specifically, the improvement in a power efficiency is about 10% at greatest, and hence, a load power efficiency is about 70% at greatest.
Japanese Patent No. 2616464 has suggested a power amplifying circuit which allows a high-power transistor carrying out amplification at B-grade bias to supply an output to a transmission line having a certain characteristic impedance. In the suggested circuit, an output terminal of the high-power transistor is electrically connected to the transmission line through an impedance matching circuit having a length of xcex/4 wherein xcex indicates a wavelength of a fundamental harmonics. A plurality of oscillators electrically connected in series to one another is electrically connected at one ends thereof to a connection at which the impedance circuit is connected to the transmission line. The oscillators are electrically connected at the other ends thereof to an earth electrode. Each of the oscillators resonates to one of the second- or more order higher harmonics, and have a reactance greater than the certain characteristic impedance at a fundamental frequency.
Japanese Unexamined Patent Publication No. 6-243873 has suggested an amplifier including an open stub having a length of xcex/8 wherein xcex indicates a wavelength of a fundamental harmonics, and an inductor grounded at one end. Both the open stub and the inductor are electrically connected to an output terminal of an amplifying device. The open stub and the inductor resonate in parallel for a fundamental harmonics.
Japanese Patent Publication No. 8-8459 has suggested a power amplifier including an active element, a first line having a length of Mxc3x97xcex/4 wherein M is an odd number, an oscillation circuit which resonates with a frequency of a fundamental harmonics. The active element is made carry out switching action, and resultingly, there are generated rectangular waves. The first line and the oscillation circuit are connected in series between an output terminal of the active element and an earth such that a fundamental harmonics having a wavelength of xcex is obtained from the rectangular waves. Two second lines each having a length of xcex/8 are connected at one ends thereof to a connection point at which the first line is connected to the oscillation circuit. One of the second lines is open at the other end thereof, and the other of the second lines is grounded at the other end.
However, the abovexe2x80x94mentioned problems that residual reactance is generated by the added parallel stubs and that a power efficiency cannot be enhanced so much remain unsolved even by the abovexe2x80x94mentioned Publications.
In view of the abovexe2x80x94mentioned problems in the conventional circuits, it is an object of the present invention to provide a circuit for dealing with higher harmonics which circuit is capable of avoiding generation of residual reactance caused by added parallel stubs.
It is also an object of the present invention to provide a power amplifying circuit which is capable of enhancing a load power efficiency.
In one aspect of the present invention, there is provided a circuit connected between an output terminal of an amplification transistor and a resistor for dealing with higher harmonics included in an output signal transmitted from the amplification transistor, including (a) a first transmission line having an input terminal electrically connected to the output terminal of the amplification transistor, and having a length of xcex/4 wherein xcex indicates a wavelength of a fundamental harmonic, (b) a first group of transmission lines, including N transmission lines electrically connected in parallel with one another to an output terminal of the first transmission line, wherein N is an integer equal to or greater than 1, each of the N transmission lines having a length L defined by the following equation: L=xcex/4 (1+M) (M=1, 2, 3, - - -, N), each of the N transmission lines having an open end, and (c) a second group of transmission lines, including N transmission lines electrically connected in parallel with one another to an output terminal of the first transmission line, each of the N transmission lines having a length Lh defined by the following equation: Lh+L=xcex/2, each of the N transmission lines having an open end.
It is preferable that the length Lh is defined by the following equation:
Lh=xcex(1+2M)/4(1+M). 
It is preferable that the circuit further includes a second transmission line having a length of xcex/4 and located between an output terminal of the first transmission line and the resistor.
It is preferable that each of the first group of transmission lines is arranged in symmetry with each of the second group of transmission lines in a lengthwise direction of the first transmission line.
It is preferable that each of the first group of transmission lines and each of the second group of transmission lines extend from the same point.
It is preferable that each of the first group of transmission lines and each of the second group of transmission lines radially extend from the same point.
It is preferable that each of the first group of transmission lines radially extend from the same point on one of sides of the first transmission line and each of the second group of transmission lines radially extend from the same point on the other side of the first transmission line.
In another aspect of the present invention there is provided an amplification circuit including (a) an amplification transistor, and (b) the abovexe2x80x94mentioned circuit which deals with higher harmonics included in an output signal transmitted from the amplification transistor.
It is preferable that the amplification transistor has a maximum oscillation frequency 3 N or more times equal to or greater than a frequency of the fundamental harmonics.
It is preferable that the amplification circuit further includes a third transmission line having a wavelength of xcex/4 and electrically connected in series to a base of the amplification transistor.
It is preferable that the amplification circuit further includes a first coupling capacitor located upstream of the third transmission line and electrically connected in series to the third transmission line for prohibiting a direct current to flow therethrough.
It is preferable that the amplification circuit further includes a second coupling capacitor located downstream of the second transmission line and electrically connected in series to the second transmission line for prohibiting a direct current to flow therethrough.
For instance, the amplification transistor may be selected from a heterojunction bipolar transistor (HBT), a high electron mobility transistor (HEMT), a Si-MOSFET or a GaAs FET.
The advantages obtained by the aforementioned present invention will be described hereinbelow.
In accordance with the present invention, it is possible to eliminate residual reactance caused by parallel stubs with optimal conditions to a fundamental harmonics being maintained. Hence, it would be possible to ideally deal with higher harmonics, ensuring a high power efficiency.
The above and other objects and advantageous features of the present invention will be made apparent from the following description made with reference to the accompanying drawings, in which like reference characters designate the same or similar parts throughout the drawings.